Automated Technology for Verification and Analysis (Record no. 56690)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 05048nam a22006015i 4500 |
| 001 - CONTROL NUMBER | |
| control field | 978-3-319-46520-3 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20200421112042.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 160921s2016 gw | s |||| 0|eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9783319465203 |
| -- | 978-3-319-46520-3 |
| 082 04 - CLASSIFICATION NUMBER | |
| Call Number | 005.1 |
| 245 10 - TITLE STATEMENT | |
| Title | Automated Technology for Verification and Analysis |
| Sub Title | 14th International Symposium, ATVA 2016, Chiba, Japan, October 17-20, 2016, Proceedings / |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | XI, 530 p. 102 illus. |
| 490 1# - SERIES STATEMENT | |
| Series statement | Lecture Notes in Computer Science, |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Remark 2 | Keynote -- Synthesizing and Completely Testing Hardware based on Templates through Small Numbers of Test Patterns -- Markov Models, Chains, and Decision Processes -- Approximate Policy Iteration for Markov Decision Processes via Quantitative Adaptive Aggregations. -Optimizing the Expected Mean Payoff in Energy Markov Decision Processes -- Parameter Synthesis for Markov Models: Faster Than Ever -- Bounded Model Checking for Probabilistic Programs -- Counter Systems, Automata -- How Hard Is It to Verify Flat Affine Counter Systems with the Finite Monoid Property -- Solving Language Equations using Flanked Automata -- Spot 2.0 - a Framework for LTL and (S}(B-Automata Manipulation -- MoChiBA: Probabilistic LTL Model Checking Using Limit- Deterministic B�uchi Automata -- Parallelism, Concurrency -- Synchronous Products of Rewrite Systems -- Specifying and Verifying Secrecy in Workflows with Arbitrarily Many Agents -- Lazy Sequentialization for the Safety Verification of Unbounded Concurrent Programs -- Parallel SMT-Based Parameter Synthesis with Application to Piecewise Multi-Affine Systems -- Complexity, Decidability -- On Finite Domains in First-Order Linear Temporal Logic -- Decidability Results for Multi-Objective Stochastic Games -- A Decision Procedure for Separation Logic in SMT -- Solving Mean-Payoff Games on the GPU -- Synthesis, Refinement -- Synthesizing Skeletons for Reactive Systems -- Observational Refinement and Merge for Disjunctive MTSs -- Equivalence-Based Abstraction Refinement for muHORS Model Checking -- Optimization, Heuristics, Partial-Order Reductions -- Greener Bits: Formal Analysis of Demand Response -- Heuristics for Checking Liveness Properties with Partial Order Reductions. - Partial-Order Reduction for GPU Model Checking -- Efficient Verification of Program Fragments: Eager POR -- Solving Procedures, Model Checking -- Skolem Functions for DQBF -- STL Model Checking of Continuous and Hybrid Systems -- Clause Sharing and Partitioning for Cloud-Based SMT Solving -- Symbolic Model Checking for Factored Probabilistic Models -- Program Analysis -- A Sketching-Based Approach for Debugging Using Test Cases -- Polynomial Invariants by Linear Algebra -- Certified Symbolic Execution -- Tighter Loop Bound Analysis. . |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc | This book constitutes the proceedings of the 14th International Symposium on Automated Technology for Verification and Analysis, ATVA 2016, held in Chiba, Japan, in October 2016. The 31 papers presented in this volume were carefully reviewed and selected from 82 submissions. They were organized in topical sections named: keynote; Markov models, chains, and decision processes; counter systems, automata; parallelism, concurrency; complexity, decidability; synthesis, refinement; optimization, heuristics, partial-order reductions; solving procedures, model checking; and program analysis. . |
| 700 1# - AUTHOR 2 | |
| Author 2 | Artho, Cyrille. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Legay, Axel. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Peled, Doron. |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | http://dx.doi.org/10.1007/978-3-319-46520-3 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | eBooks |
| 264 #1 - | |
| -- | Cham : |
| -- | Springer International Publishing : |
| -- | Imprint: Springer, |
| -- | 2016. |
| 336 ## - | |
| -- | text |
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| -- | computer |
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| -- | rdamedia |
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| -- | online resource |
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| 347 ## - | |
| -- | text file |
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| -- | rda |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computer science. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computer programming. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Software engineering. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Programming languages (Electronic computers). |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computer logic. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Mathematical logic. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Artificial intelligence. |
| 650 14 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computer Science. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Software Engineering. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Programming Languages, Compilers, Interpreters. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Logics and Meanings of Programs. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Mathematical Logic and Formal Languages. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Artificial Intelligence (incl. Robotics). |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Programming Techniques. |
| 830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE | |
| -- | 0302-9743 ; |
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| -- | ZDB-2-LNC |
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