An Introduction to Logic Circuit Testing (Record no. 85373)

000 -LEADER
fixed length control field 03266nam a22005535i 4500
001 - CONTROL NUMBER
control field 978-3-031-79785-9
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20240730164154.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 220601s2009 sz | s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
ISBN 9783031797859
-- 978-3-031-79785-9
082 04 - CLASSIFICATION NUMBER
Call Number 620
100 1# - AUTHOR NAME
Author Lala, Parag K.
245 13 - TITLE STATEMENT
Title An Introduction to Logic Circuit Testing
250 ## - EDITION STATEMENT
Edition statement 1st ed. 2009.
300 ## - PHYSICAL DESCRIPTION
Number of Pages X, 99 p.
490 1# - SERIES STATEMENT
Series statement Synthesis Lectures on Digital Circuits & Systems,
505 0# - FORMATTED CONTENTS NOTE
Remark 2 Introduction -- Fault Detection in Logic Circuits -- Design for Testability -- Built-in Self-Test -- References.
520 ## - SUMMARY, ETC.
Summary, etc An Introduction to Logic Circuit Testing provides a detailed coverage of techniques for test generation and testable design of digital electronic circuits/systems. The material covered in the book should be sufficient for a course, or part of a course, in digital circuit testing for senior-level undergraduate and first-year graduate students in Electrical Engineering and Computer Science. The book will also be a valuable resource for engineers working in the industry. This book has four chapters. Chapter 1 deals with various types of faults that may occur in very large scale integration (VLSI)-based digital circuits. Chapter 2 introduces the major concepts of all test generation techniques such as redundancy, fault coverage, sensitization, and backtracking. Chapter 3 introduces the key concepts of testability, followed by some ad hoc design-for-testability rules that can be used to enhance testability of combinational circuits. Chapter 4 deals with test generation and response evaluation techniques used in BIST (built-in self-test) schemes for VLSI chips. Table of Contents: Introduction / Fault Detection in Logic Circuits / Design for Testability / Built-in Self-Test / References.
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier https://doi.org/10.1007/978-3-031-79785-9
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type eBooks
264 #1 -
-- Cham :
-- Springer International Publishing :
-- Imprint: Springer,
-- 2009.
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-- text
-- txt
-- rdacontent
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-- computer
-- c
-- rdamedia
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-- online resource
-- cr
-- rdacarrier
347 ## -
-- text file
-- PDF
-- rda
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Engineering.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronic circuits.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Control engineering.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Robotics.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Automation.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Computers.
650 14 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Technology and Engineering.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronic Circuits and Systems.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Control, Robotics, Automation.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Computer Hardware.
830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE
-- 1932-3174
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-- ZDB-2-SXSC

No items available.