Digital systems testing and testable design / Miron Abramovici, Melvin A. Breuer, Arthur D. Friedman.
By: Abramovici, Miron [author.].
Contributor(s): Breuer, Melvin A | Friedman, Arthur D | John Wiley & Sons [publisher.] | IEEE Xplore (Online service) [distributor.].
Material type:
BookSeries: Electrical engineering, communications, and signal processing: Publisher: New York, NY : Computer Science Press, c1990Distributor: [Piscataqay, New Jersey] : IEEE Xplore, [1994]Description: 1 PDF (xxi, 653 pages) : illustrations.Content type: text Media type: electronic Carrier type: online resourceISBN: 9780470544389.Subject(s): Digital integrated circuits -- Testing | Digital integrated circuits -- Design and construction | Algorithm design and analysis | Analytical models | Books | Boolean functions | Built-in self-test | Circuit faults | Circuit synthesis | Combinational circuits | Complexity theory | Computational modeling | Controllability | Data models | Data structures | Decoding | Design for testability | Dictionaries | Digital systems | Discrete Fourier transforms | Electrical fault detection | Environmental factors | Equations | Error correction codes | Fabrication | Fault detection | Fault diagnosis | Feedback loop | Generators | Gold | Hardware | Indexes | Integrated circuit interconnections | Integrated circuit modeling | Integrated circuits | Logic functions | Logic gates | Maintenance engineering | Microprocessors | Object oriented modeling | Observability | Oscillators | Parity check codes | Programmable logic arrays | Prototypes | Radiation detectors | Redundancy | Registers | Sequential circuits | Sequential diagnosis | Software | Sufficient conditions | Synchronization | Target tracking | Testing | TimingGenre/Form: Electronic books.Additional physical formats: Print version:: No titleDDC classification: 621.381/5 Online resources: Abstract with links to resource Also available in print.Includes bibliographical references (p. 644-645) and index.
Preface. How This Book Was Written. Introduction. Modeling. Logic Simulation. Fault Modeling. Fault Simulation. Testing For Single Stuck Faults. Testing For Bridging Faults. Functional Testing. Design For Testability. Compression Techniques. Built-In Self-Test. Logic-Level Diagnosis. Self-Checking Design. PLA Testing. System-Level Diagnosis. Index.
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This updated printing of the leading text and reference in digital systems testing and testable design provides comprehensive, state-of-the-art coverage of the field. Included are extensive discussions of test generation, fault modeling for classic and new technologies, simulation, fault simulation, design for testability, built-in self-test, and diagnosis. Complete with numerous problems, this book is a must-have for test engineers, ASIC and system designers, and CAD developers, and advanced engineering students will find this book an invaluable tool to keep current with recent changes in the field.
Also available in print.
Mode of access: World Wide Web
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