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A New Family of CMOS Cascode-Free Amplifiers with High Energy-Efficiency and Improved Gain [electronic resource] / by Ricardo Filipe Sereno Póvoa, João Carlos da Palma Goes, Nuno Cavaco Gomes Horta.

By: Póvoa, Ricardo Filipe Sereno [author.].
Contributor(s): Goes, João Carlos da Palma [author.] | Horta, Nuno Cavaco Gomes [author.] | SpringerLink (Online service).
Material type: materialTypeLabelBookPublisher: Cham : Springer International Publishing : Imprint: Springer, 2019Edition: 1st ed. 2019.Description: XVI, 141 p. 121 illus., 53 illus. in color. online resource.Content type: text Media type: computer Carrier type: online resourceISBN: 9783319952079.Subject(s): Electronic circuits | Signal processing | Electronics | Electronic Circuits and Systems | Signal, Speech and Image Processing | Electronics and Microelectronics, InstrumentationAdditional physical formats: Printed edition:: No title; Printed edition:: No title; Printed edition:: No titleDDC classification: 621.3815 Online resources: Click here to access online
Contents:
Introduction -- Background and State-of-the-art -- Proposed Architectures and Practical Realizations -- Optimization Design and Simulation Results -- Integrated Prototypes and Experimental Evaluation -- Conclusions.
In: Springer Nature eBookSummary: This book addresses the need for energy-efficient amplifiers, providing gain enhancement strategies, suitable to run in parallel with lower supply voltages, by introducing a new family of single-stage cascode-free amplifiers, with proper design, optimization, fabrication and experimental evaluation. The authors describe several topologies, using the UMC 130 nm CMOS technology node with standard-VT devices, for proof-of-concept, achieving results far beyond what is achievable with a classic single-stage folded-cascode amplifier. Readers will learn about a new family of circuits with a broad range of applications, together with the familiarization with a state-of-the-art electronic design automation methodology used to explore the design space of the proposed circuit family. Introduces a new family of CMOS cascode-free amplifiers with high energy-efficiency and improved gain; Describes innovative circuit topologies: the Voltage-Combiners biased OTA (supplied by a 3.3 V source); the Voltage-Combiners biased OTA with Current Starving, for higher gain and energy-efficiency (supplied by a 3.3 V source); the Folded Voltage-Combiners biased OTA (supplied by sources from 1.2 V to 0.9 V); and a Dynamic Voltage-Combiners biased OTA, for high performance analog-to-digital converters (supplied by a 1.2 V source); Enables readers to reach better results than what is achievable with classic single-stage folded-cascode amplifiers, with state-of-the-art results in the context of dynamically biased amplifiers;.
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Introduction -- Background and State-of-the-art -- Proposed Architectures and Practical Realizations -- Optimization Design and Simulation Results -- Integrated Prototypes and Experimental Evaluation -- Conclusions.

This book addresses the need for energy-efficient amplifiers, providing gain enhancement strategies, suitable to run in parallel with lower supply voltages, by introducing a new family of single-stage cascode-free amplifiers, with proper design, optimization, fabrication and experimental evaluation. The authors describe several topologies, using the UMC 130 nm CMOS technology node with standard-VT devices, for proof-of-concept, achieving results far beyond what is achievable with a classic single-stage folded-cascode amplifier. Readers will learn about a new family of circuits with a broad range of applications, together with the familiarization with a state-of-the-art electronic design automation methodology used to explore the design space of the proposed circuit family. Introduces a new family of CMOS cascode-free amplifiers with high energy-efficiency and improved gain; Describes innovative circuit topologies: the Voltage-Combiners biased OTA (supplied by a 3.3 V source); the Voltage-Combiners biased OTA with Current Starving, for higher gain and energy-efficiency (supplied by a 3.3 V source); the Folded Voltage-Combiners biased OTA (supplied by sources from 1.2 V to 0.9 V); and a Dynamic Voltage-Combiners biased OTA, for high performance analog-to-digital converters (supplied by a 1.2 V source); Enables readers to reach better results than what is achievable with classic single-stage folded-cascode amplifiers, with state-of-the-art results in the context of dynamically biased amplifiers;.

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