000			03298nam a22005055i 4500
001			978-3-319-12370-7
003			DE-He213
005			20200420220215.0
007			cr nn 008mamaa
008			141212s2015 gw | s |||| 0|eng d
020			_a9783319123707 _9978-3-319-12370-7
024	7		_a10.1007/978-3-319-12370-7 _2doi
050		4	_aTK5102.9
050		4	_aTA1637-1638
050		4	_aTK7882.S65
072		7	_aTTBM _2bicssc
072		7	_aUYS _2bicssc
072		7	_aTEC008000 _2bisacsh
072		7	_aCOM073000 _2bisacsh
082	0	4	_a621.382 _223
100	1		_aRebeiro, Chester. _eauthor.
245	1	0	_aTiming Channels in Cryptography _h[electronic resource] : _bA Micro-Architectural Perspective / _cby Chester Rebeiro, Debdeep Mukhopadhyay, Sarani Bhattacharya.
264		1	_aCham : _bSpringer International Publishing : _bImprint: Springer, _c2015.
300			_aXVII, 152 p. 75 illus., 14 illus. in color. _bonline resource.
336			_atext _btxt _2rdacontent
337			_acomputer _bc _2rdamedia
338			_aonline resource _bcr _2rdacarrier
347			_atext file _bPDF _2rda
505	0		_aAn Introduction to Timing Attacks -- Modern Cryptography -- Superscalar Processors, Cache Memories, and Branch Predictors -- Time-Driven Cache Attacks -- Advanced Time-Driven Cache Attacks on Block Ciphers -- A Formal Analysis of Time-Driven Cache Attacks -- Profiled Time-Driven Cache Attacks on Block Ciphers -- Access-Driven Cache Attacks on Block Ciphers -- Branch Prediction Attacks -- Countermeasures for Timing Attacks.
520			_aThis book deals with timing attacks on software implementations of encryption algorithms. It describes and analyzes various unintended covert timing channels that are formed when ciphers are executed in microprocessors. Modern superscalar microprocessors are considered, which are enabled with features such as multi-threaded, pipelined, parallel, speculative, and out-of-order execution. Various timing attack algorithms are described and analyzed for  block ciphers as well as public-key ciphers. The interplay between the cipher implementation, system architecture, and the attack's success is analyzed. Further hardware and software countermeasures are discussed with the aim of illustrating methods to build systems that can protect against these attacks. Discusses various timing attack algorithms in detail allowing readers to reconstruct the attack. Provides several experimental results to support the theoretical analysis provided in the book. Analyzes information leakage from cache memories and branch prediction units in the processor. Examines information leakage models that would help quantify leakage in a covert timing channels.
650		0	_aEngineering.
650		0	_aData structures (Computer science).
650	1	4	_aEngineering.
650	2	4	_aSignal, Image and Speech Processing.
650	2	4	_aData Structures, Cryptology and Information Theory.
700	1		_aMukhopadhyay, Debdeep. _eauthor.
700	1		_aBhattacharya, Sarani. _eauthor.
710	2		_aSpringerLink (Online service)
773	0		_tSpringer eBooks
776	0	8	_iPrinted edition: _z9783319123691
856	4	0	_uhttp://dx.doi.org/10.1007/978-3-319-12370-7
912			_aZDB-2-ENG
942			_cEBK
999			_c51563 _d51563