000 04853nam a22004935i 4500
001 978-1-4614-1791-0
003 DE-He213
005 20200421111204.0
007 cr nn 008mamaa
008 130502s2013 xxu| s |||| 0|eng d
020 _a9781461417910
_9978-1-4614-1791-0
024 7 _a10.1007/978-1-4614-1791-0
_2doi
050 4 _aTK7888.4
072 7 _aTJFC
_2bicssc
072 7 _aTEC008010
_2bisacsh
082 0 4 _a621.3815
_223
245 1 0 _aHigh-Performance Computing Using FPGAs
_h[electronic resource] /
_cedited by Wim Vanderbauwhede, Khaled Benkrid.
264 1 _aNew York, NY :
_bSpringer New York :
_bImprint: Springer,
_c2013.
300 _aXI, 803 p. 232 illus.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
505 0 _aHigh-Performance Hardware Acceleration of Asset Simulations -- Monte Carlo Simulation based Financial Computing on the Maxwell FPGA Parallel Machine -- Bioinformatics Applications on the FPGA-based High-Performance Computer RIVYERA -- FPGA-Accelerated Molecular Dynamics -- FPGA-based HPRC for Bioinformatics Applications -- High-Performance Computing for Neuroinformatics using FPGA -- High-Performance FPGA-Accelerated Real-time Search -- High-Performance Data Processing over N-ary Trees -- FPGA-based Systolic Computational-Memory Array for Scalable Stencil Computations -- High performance implementation of RTM seismic modeling on FPGAs: architecture, arithmetic and power issues -- High-Performance Cryptanalysis on RIVYERA and COPACOBANA Computing Systems -- FPGA-based HPRC Systems for Scientific Applications -- Accelerating the SPICE Circuit Simulator using an FPGA - A Case Study -- The Convey Hybrid-Core Architecture -- Low Cost High Performance Reconfigurable Computing -- An FPGA-based supercomputer for statistical physics: the weird case of Janus -- Accelerate Communication, not Computation! -- High-speed torus interconnect using FPGAs -- MEMSCALE: Re-architecting memory resources for clusters -- High-performance computing based on high-speed dynamic reconfiguration -- Reconfigurable arithmetic for HPC -- Acceleration of the Discrete Element Method: From RTL to C-Based Design -- Optimising Euroben Kernels on Maxwell -- Assessing Productivity of High-Level Design Methodologies for High-Performance Reconfigurable Computers -- Maximum performance computing with dataflow engines.
520 _aThis book is concerned with the emerging field of High Performance Reconfigurable Computing (HPRC), which aims to harness the high performance and relative low power of reconfigurable hardware-in the form Field Programmable Gate Arrays (FPGAs)-in High Performance Computing (HPC) applications. It presents the latest developments in this field from applications, architecture, and tools and methodologies points of view. We hope that this work will form a reference for existing researchers in the field, and entice new researchers and developers to join the HPRC community.  The book includes:  Thirteen application chapters which present the most important application areas tackled by high performance reconfigurable computers, namely: financial computing, bioinformatics and computational biology, data search and processing, stencil computation e.g. computational fluid dynamics and seismic modeling, cryptanalysis, astronomical N-body simulation, and circuit simulation.     Seven architecture chapters which present both commercial and academic parallel FPGA architectures, low latency and high performance FPGA-based networks and memory architectures for parallel machines, and a high speed optical dynamic reconfiguration mechanism for HPRC.  Five tools and methodologies chapters which address the important issue of productivity and high performance in HPRC. These include a study of precision and arithmetic issues in HPRC, comparative studies of C-based high level synthesis tools and RTL-based approaches, taxonomy of HPRC tools and a framework of their analysis, and an integrated hardware-software-application approach to HPRC.
650 0 _aEngineering.
650 0 _aMicroprocessors.
650 0 _aInformation theory.
650 0 _aElectronic circuits.
650 1 4 _aEngineering.
650 2 4 _aCircuits and Systems.
650 2 4 _aProcessor Architectures.
650 2 4 _aInformation and Communication, Circuits.
650 2 4 _aElectronic Circuits and Devices.
700 1 _aVanderbauwhede, Wim.
_eeditor.
700 1 _aBenkrid, Khaled.
_eeditor.
710 2 _aSpringerLink (Online service)
773 0 _tSpringer eBooks
776 0 8 _iPrinted edition:
_z9781461417903
856 4 0 _uhttp://dx.doi.org/10.1007/978-1-4614-1791-0
912 _aZDB-2-ENG
942 _cEBK
999 _c54002
_d54002