000 | 02719nam a22005055i 4500 | ||
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001 | 978-3-642-36166-1 | ||
003 | DE-He213 | ||
005 | 20200421112052.0 | ||
007 | cr nn 008mamaa | ||
008 | 130125s2013 gw | s |||| 0|eng d | ||
020 |
_a9783642361661 _9978-3-642-36166-1 |
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024 | 7 |
_a10.1007/978-3-642-36166-1 _2doi |
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050 | 4 | _aTK7888.4 | |
072 | 7 |
_aTJFC _2bicssc |
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072 | 7 |
_aTEC008010 _2bisacsh |
|
082 | 0 | 4 |
_a621.3815 _223 |
100 | 1 |
_aCzerwinski, Robert. _eauthor. |
|
245 | 1 | 0 |
_aFinite State Machine Logic Synthesis for Complex Programmable Logic Devices _h[electronic resource] / _cby Robert Czerwinski, Dariusz Kania. |
264 | 1 |
_aBerlin, Heidelberg : _bSpringer Berlin Heidelberg : _bImprint: Springer, _c2013. |
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300 |
_aXV, 172 p. _bonline resource. |
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336 |
_atext _btxt _2rdacontent |
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337 |
_acomputer _bc _2rdamedia |
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338 |
_aonline resource _bcr _2rdacarrier |
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347 |
_atext file _bPDF _2rda |
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490 | 1 |
_aLecture Notes in Electrical Engineering, _x1876-1100 ; _v231 |
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505 | 0 | _aIntroduction -- Definitions and Basic Properties -- Synthesis of FSMs -- State Assignment Algorithms -- Theoretical Background of Technology-Dependent Optimization -- The Algorithm of Area Optimization Based on Graphs of Outputs -- Conclusions -- Output File Format -- Conclusion. | |
520 | _aThis book is a monograph devoted to logic synthesis and optimization for CPLDs. CPLDs' macrocell can also be interpreted as programmable AND-fixed OR structure, well known as PAL-based structure. The question is: what should be done when the number of implicants representing function exceeds the number of product terms available in a logic block. The answer is ... in the book. Logic synthesis and optimization methods dedicated for PAL-based structures are proposed. The methods strive to find the optimum fit for the combinational logic and finite state machines to the structure of the logic device and aim at area and speed optimization. The theoretical background and complete strategies are richly illustrated with examples and figures. | ||
650 | 0 | _aEngineering. | |
650 | 0 | _aLogic design. | |
650 | 0 | _aEngineering design. | |
650 | 0 | _aElectronic circuits. | |
650 | 1 | 4 | _aEngineering. |
650 | 2 | 4 | _aCircuits and Systems. |
650 | 2 | 4 | _aLogic Design. |
650 | 2 | 4 | _aEngineering Design. |
700 | 1 |
_aKania, Dariusz. _eauthor. |
|
710 | 2 | _aSpringerLink (Online service) | |
773 | 0 | _tSpringer eBooks | |
776 | 0 | 8 |
_iPrinted edition: _z9783642361654 |
830 | 0 |
_aLecture Notes in Electrical Engineering, _x1876-1100 ; _v231 |
|
856 | 4 | 0 | _uhttp://dx.doi.org/10.1007/978-3-642-36166-1 |
912 | _aZDB-2-ENG | ||
942 | _cEBK | ||
999 |
_c57248 _d57248 |