000 | 03009nam a22005655i 4500 | ||
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001 | 978-3-642-31229-8 | ||
003 | DE-He213 | ||
005 | 20200421112223.0 | ||
007 | cr nn 008mamaa | ||
008 | 121227s2013 gw | s |||| 0|eng d | ||
020 |
_a9783642312298 _9978-3-642-31229-8 |
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024 | 7 |
_a10.1007/978-3-642-31229-8 _2doi |
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050 | 4 | _aTK5102.9 | |
050 | 4 | _aTA1637-1638 | |
050 | 4 | _aTK7882.S65 | |
072 | 7 |
_aTTBM _2bicssc |
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072 | 7 |
_aUYS _2bicssc |
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072 | 7 |
_aTEC008000 _2bisacsh |
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072 | 7 |
_aCOM073000 _2bisacsh |
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082 | 0 | 4 |
_a621.382 _223 |
100 | 1 |
_aClara, Martin. _eauthor. |
|
245 | 1 | 0 |
_aHigh-Performance D/A-Converters _h[electronic resource] : _bApplication to Digital Transceivers / _cby Martin Clara. |
264 | 1 |
_aBerlin, Heidelberg : _bSpringer Berlin Heidelberg : _bImprint: Springer, _c2013. |
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300 |
_aXXII, 286 p. _bonline resource. |
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336 |
_atext _btxt _2rdacontent |
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337 |
_acomputer _bc _2rdamedia |
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338 |
_aonline resource _bcr _2rdacarrier |
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347 |
_atext file _bPDF _2rda |
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490 | 1 |
_aSpringer Series in Advanced Microelectronics, _x1437-0387 ; _v36 |
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505 | 0 | _aPerformance Figures of D/A-Converters -- Static Linearity -- Dynamic Linearity -- Noise-shaped D/A-Converters -- Advanced Current Calibration. | |
520 | _aThis book deals with modeling and implementation of high performance, current-steering D/A-converters for digital transceivers in nanometer CMOS technology. In the first part, the fundamental performance limitations of current-steering DACs are discussed. Based on simplified models, closed-form expressions for a number of basic non-ideal effects are derived and tested. With the knowledge of basic performance limits, the converter and system architecture can be optimized in an early design phase, trading off circuit complexity, silicon area and power dissipation for static and dynamic performance. The second part describes four different current-steering DAC designs in standard 130 nm CMOS. The converters have a resolution in the range of 12-14 bits for an analog bandwidth between 2.2 MHz and 50 MHz and sampling rates from 100 MHz to 350 MHz. Dynamic-Element-Matching (DEM) and advanced dynamic current calibration techniques are employed to minimize the required silicon area. | ||
650 | 0 | _aEngineering. | |
650 | 0 | _aSemiconductors. | |
650 | 0 | _aElectronic circuits. | |
650 | 0 | _aElectronics. | |
650 | 0 | _aMicroelectronics. | |
650 | 1 | 4 | _aEngineering. |
650 | 2 | 4 | _aSignal, Image and Speech Processing. |
650 | 2 | 4 | _aElectronics and Microelectronics, Instrumentation. |
650 | 2 | 4 | _aSemiconductors. |
650 | 2 | 4 | _aElectronic Circuits and Devices. |
710 | 2 | _aSpringerLink (Online service) | |
773 | 0 | _tSpringer eBooks | |
776 | 0 | 8 |
_iPrinted edition: _z9783642312281 |
830 | 0 |
_aSpringer Series in Advanced Microelectronics, _x1437-0387 ; _v36 |
|
856 | 4 | 0 | _uhttp://dx.doi.org/10.1007/978-3-642-31229-8 |
912 | _aZDB-2-ENG | ||
942 | _cEBK | ||
999 |
_c57550 _d57550 |