000 04858nam a2201189 i 4500
001 5266057
003 IEEE
005 20220712205703.0
006 m o d
007 cr |n|||||||||
008 100317t20151990nyua ob 001 0 eng d
020 _a9780470544389
_qelectronic
020 _z9780780310629
_qprint
020 _z0470544384
_qelectronic
024 7 _a10.1109/9780470544389
_2doi
035 _a(CaBNVSL)mat05266057
035 _a(IDAMS)0b000064810c5c91
040 _aCaBNVSL
_beng
_erda
_cCaBNVSL
_dCaBNVSL
050 4 _aTK7874
_b.A23 1990eb
082 0 4 _a621.381/5
_222
100 1 _aAbramovici, Miron,
_eauthor.
_927029
245 1 0 _aDigital systems testing and testable design /
_cMiron Abramovici, Melvin A. Breuer, Arthur D. Friedman.
264 1 _aNew York, NY :
_bComputer Science Press,
_cc1990.
264 2 _a[Piscataqay, New Jersey] :
_bIEEE Xplore,
_c[1994]
300 _a1 PDF (xxi, 653 pages) :
_billustrations.
336 _atext
_2rdacontent
337 _aelectronic
_2isbdmedia
338 _aonline resource
_2rdacarrier
490 1 _aElectrical engineering, communications, and signal processing
504 _aIncludes bibliographical references (p. 644-645) and index.
505 0 _aPreface. How This Book Was Written. Introduction. Modeling. Logic Simulation. Fault Modeling. Fault Simulation. Testing For Single Stuck Faults. Testing For Bridging Faults. Functional Testing. Design For Testability. Compression Techniques. Built-In Self-Test. Logic-Level Diagnosis. Self-Checking Design. PLA Testing. System-Level Diagnosis. Index.
506 1 _aRestricted to subscribers or individual electronic text purchasers.
520 _aThis updated printing of the leading text and reference in digital systems testing and testable design provides comprehensive, state-of-the-art coverage of the field. Included are extensive discussions of test generation, fault modeling for classic and new technologies, simulation, fault simulation, design for testability, built-in self-test, and diagnosis. Complete with numerous problems, this book is a must-have for test engineers, ASIC and system designers, and CAD developers, and advanced engineering students will find this book an invaluable tool to keep current with recent changes in the field.
530 _aAlso available in print.
538 _aMode of access: World Wide Web
588 _aDescription based on PDF viewed 12/21/2015.
650 0 _aDigital integrated circuits
_xTesting.
_920440
650 0 _aDigital integrated circuits
_xDesign and construction.
_927030
655 0 _aElectronic books.
_93294
695 _aData models
695 _aData structures
695 _aDecoding
695 _aDesign for testability
695 _aDictionaries
695 _aDigital systems
695 _aDiscrete Fourier transforms
695 _aElectrical fault detection
695 _aEnvironmental factors
695 _aEquations
695 _aError correction codes
695 _aFabrication
695 _aFault detection
695 _aFault diagnosis
695 _aFeedback loop
695 _aGenerators
695 _aGold
695 _aHardware
695 _aIndexes
695 _aIntegrated circuit interconnections
695 _aIntegrated circuit modeling
695 _aIntegrated circuits
695 _aLogic functions
695 _aLogic gates
695 _aMaintenance engineering
695 _aMicroprocessors
695 _aObject oriented modeling
695 _aObservability
695 _aOscillators
695 _aParity check codes
695 _aProgrammable logic arrays
695 _aPrototypes
695 _aRadiation detectors
695 _aRedundancy
695 _aRegisters
695 _aSequential circuits
695 _aSequential diagnosis
695 _aSoftware
695 _aSufficient conditions
695 _aSynchronization
695 _aTarget tracking
695 _aTesting
695 _aTiming
695 _aAlgorithm design and analysis
695 _aAnalytical models
695 _aBooks
695 _aBoolean functions
695 _aBuilt-in self-test
695 _aCircuit faults
695 _aCircuit synthesis
695 _aCombinational circuits
695 _aComplexity theory
695 _aComputational modeling
695 _aControllability
700 1 _aBreuer, Melvin A.
_927031
700 1 _aFriedman, Arthur D.
_927032
710 2 _aJohn Wiley & Sons,
_epublisher.
_96902
710 2 _aIEEE Xplore (Online service),
_edistributor.
_927033
776 0 8 _iPrint version:
_z9780780310629
830 0 _aElectrical engineering, communications, and signal processing
_927034
856 4 2 _3Abstract with links to resource
_uhttps://ieeexplore.ieee.org/xpl/bkabstractplus.jsp?bkn=5266057
942 _cEBK
999 _c73947
_d73947