000 | 03915nam a22005775i 4500 | ||
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001 | 978-3-030-31585-6 | ||
003 | DE-He213 | ||
005 | 20220801213830.0 | ||
007 | cr nn 008mamaa | ||
008 | 191220s2020 sz | s |||| 0|eng d | ||
020 |
_a9783030315856 _9978-3-030-31585-6 |
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024 | 7 |
_a10.1007/978-3-030-31585-6 _2doi |
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050 | 4 | _aTK7867-7867.5 | |
072 | 7 |
_aTJFC _2bicssc |
|
072 | 7 |
_aTEC008010 _2bisacsh |
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072 | 7 |
_aTJFC _2thema |
|
082 | 0 | 4 |
_a621.3815 _223 |
245 | 1 | 0 |
_aLanguages, Design Methods, and Tools for Electronic System Design _h[electronic resource] : _bSelected Contributions from FDL 2018 / _cedited by Tom J. Kazmierski, Sebastian Steinhorst, Daniel Große. |
250 | _a1st ed. 2020. | ||
264 | 1 |
_aCham : _bSpringer International Publishing : _bImprint: Springer, _c2020. |
|
300 |
_aVII, 192 p. 77 illus., 41 illus. in color. _bonline resource. |
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336 |
_atext _btxt _2rdacontent |
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337 |
_acomputer _bc _2rdamedia |
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338 |
_aonline resource _bcr _2rdacarrier |
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347 |
_atext file _bPDF _2rda |
||
490 | 1 |
_aLecture Notes in Electrical Engineering, _x1876-1119 ; _v611 |
|
505 | 0 | _aIntroduction -- Automatic Generation of Cycle-Accurate Simulink Blocks from HDL IPs -- Towards Early Validation of Firmware-Based Power Management Using Virtual Prototypes: A Constrained Random Approach -- Symbolic Simulation of Dataflow Synchronous Programs with Timers -- Language and Hardware Acceleration Backend for Graph Processing -- Runtime Task Mapping for Lifetime Budgeting in Many-Core Systems -- Fault Analysis in Analog Circuits through Language Manipulation and Abstraction -- Towards Consistency Checking Between HDL and UPF Descriptions. | |
520 | _aThis book brings together a selection of the best papers from the twenty-first edition of the Forum on specification and Design Languages Conference (FDL), which took place on September 10-12, 2018, in Munich, Germany. FDL is a well-established international forum devoted to dissemination of research results, practical experiences and new ideas in the application of specification, design and verification languages to the design, modeling and verification of integrated circuits, complex hardware/software embedded systems, and mixed-technology systems. Covers Assertion Based Design, Verification & Debug; Includes language-based modeling and design techniques for embedded systems; Covers design, modeling and verification of mixed physical domain and mixed signal systems that include significant analog parts in electrical and non-electrical domains; Includes formal and semi-formal system level design methods for complex embedded systems based on the Unified Modelling Language (UML) and Model Driven Engineering (MDE). | ||
650 | 0 |
_aElectronic circuits. _919581 |
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650 | 0 |
_aMicroprocessors. _934633 |
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650 | 0 |
_aComputer architecture. _93513 |
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650 | 0 |
_aElectronics. _93425 |
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650 | 1 | 4 |
_aElectronic Circuits and Systems. _934634 |
650 | 2 | 4 |
_aProcessor Architectures. _934635 |
650 | 2 | 4 |
_aElectronics and Microelectronics, Instrumentation. _932249 |
700 | 1 |
_aKazmierski, Tom J. _eeditor. _4edt _4http://id.loc.gov/vocabulary/relators/edt _934636 |
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700 | 1 |
_aSteinhorst, Sebastian. _eeditor. _4edt _4http://id.loc.gov/vocabulary/relators/edt _934637 |
|
700 | 1 |
_aGroße, Daniel. _eeditor. _4edt _4http://id.loc.gov/vocabulary/relators/edt _934638 |
|
710 | 2 |
_aSpringerLink (Online service) _934639 |
|
773 | 0 | _tSpringer Nature eBook | |
776 | 0 | 8 |
_iPrinted edition: _z9783030315849 |
776 | 0 | 8 |
_iPrinted edition: _z9783030315863 |
776 | 0 | 8 |
_iPrinted edition: _z9783030315870 |
830 | 0 |
_aLecture Notes in Electrical Engineering, _x1876-1119 ; _v611 _934640 |
|
856 | 4 | 0 | _uhttps://doi.org/10.1007/978-3-030-31585-6 |
912 | _aZDB-2-ENG | ||
912 | _aZDB-2-SXE | ||
942 | _cEBK | ||
999 |
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