000 | 03494nam a22005415i 4500 | ||
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001 | 978-3-319-59837-6 | ||
003 | DE-He213 | ||
005 | 20220801222410.0 | ||
007 | cr nn 008mamaa | ||
008 | 170624s2018 sz | s |||| 0|eng d | ||
020 |
_a9783319598376 _9978-3-319-59837-6 |
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024 | 7 |
_a10.1007/978-3-319-59837-6 _2doi |
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050 | 4 | _aQ342 | |
072 | 7 |
_aUYQ _2bicssc |
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072 | 7 |
_aTEC009000 _2bisacsh |
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072 | 7 |
_aUYQ _2thema |
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082 | 0 | 4 |
_a006.3 _223 |
100 | 1 |
_aBarkalov, Alexander. _eauthor. _4aut _4http://id.loc.gov/vocabulary/relators/aut _961285 |
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245 | 1 | 0 |
_aLogic Synthesis for Finite State Machines Based on Linear Chains of States _h[electronic resource] : _bFoundations, Recent Developments and Challenges / _cby Alexander Barkalov, Larysa Titarenko, Jacek Bieganowski. |
250 | _a1st ed. 2018. | ||
264 | 1 |
_aCham : _bSpringer International Publishing : _bImprint: Springer, _c2018. |
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300 |
_aVIII, 225 p. 145 illus. _bonline resource. |
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336 |
_atext _btxt _2rdacontent |
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337 |
_acomputer _bc _2rdamedia |
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338 |
_aonline resource _bcr _2rdacarrier |
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347 |
_atext file _bPDF _2rda |
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490 | 1 |
_aStudies in Systems, Decision and Control, _x2198-4190 ; _v113 |
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505 | 0 | _aIntroduction -- Finite state machines and field-programmable gate arrays -- Linear chains in FSMs -- Hardware reduction for Moore UFSMs -- Hardware reduction for Mealy UFSMs -- Hardware reduction for Moore NFSMs -- Hardware reduction for Moore XFSMs. | |
520 | _aThis book discusses Moore finite state machines (FSMs) implemented with field programmable gate arrays (FPGAs) including look-up table (LUT) elements and embedded memory blocks (EMBs). To minimize the number of LUTs in FSM logic circuits, the authors propose replacing a state register with a state counter. They also put forward an approach allowing linear chains of states to be created, which simplifies the system of input memory functions and, therefore, decreases the number of LUTs in the resulting FSM circuit. The authors combine this approach with using EMBs to implement the system of output functions (microoperations). This allows a significant decrease in the number of LUTs, as well as eliminating a lot of interconnections in the FSM logic circuit. As a rule, it also reduces the area occupied by the circuit and diminishes the resulting power dissipation. This book is an interesting and valuable resource for students and postgraduates in the area of computer science, as well as for designers of digital systems that included complex control units. | ||
650 | 0 |
_aComputational intelligence. _97716 |
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650 | 0 |
_aElectronic circuits. _919581 |
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650 | 1 | 4 |
_aComputational Intelligence. _97716 |
650 | 2 | 4 |
_aElectronic Circuits and Systems. _961286 |
700 | 1 |
_aTitarenko, Larysa. _eauthor. _4aut _4http://id.loc.gov/vocabulary/relators/aut _961287 |
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700 | 1 |
_aBieganowski, Jacek. _eauthor. _4aut _4http://id.loc.gov/vocabulary/relators/aut _961288 |
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710 | 2 |
_aSpringerLink (Online service) _961289 |
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773 | 0 | _tSpringer Nature eBook | |
776 | 0 | 8 |
_iPrinted edition: _z9783319598369 |
776 | 0 | 8 |
_iPrinted edition: _z9783319598383 |
776 | 0 | 8 |
_iPrinted edition: _z9783319867144 |
830 | 0 |
_aStudies in Systems, Decision and Control, _x2198-4190 ; _v113 _961290 |
|
856 | 4 | 0 | _uhttps://doi.org/10.1007/978-3-319-59837-6 |
912 | _aZDB-2-ENG | ||
912 | _aZDB-2-SXE | ||
942 | _cEBK | ||
999 |
_c80726 _d80726 |